Various types of imagers or image sensors are in use today, including charge-coupled device (CCD) image sensors and complementary metal-oxide semiconductor CMOS image sensors. CMOS image sensors typically utilize an array of active pixel image sensors and a row or register of correlated double-sampling circuits or amplifiers to sample and hold the output of a given row of pixel image sensors of the array. Each active pixel image sensor of the array of pixels typically contains a pixel-amplifying device (usually a source follower).
CMOS image sensors have several advantages over CCD image sensors. For example, CCD image sensors are not easily integrated with CMOS process peripheral circuitry due to complex fabrication requirements and relatively high cost. However, since CMOS image sensors are formed with the same CMOS process technology as the peripheral circuitry required to operate the CMOS image sensor, such sensors are easier to integrate into a single system-on-chip using integrated circuit (IC) fabrication processes.
Moreover, by using CMOS image sensors, it is possible to have monolithic integration of control logic and timing, image processing, and signal-processing circuitry such as analog-to-digital (A/D) conversion, all within a single sensor chip. Thus, CMOS image sensors can be manufactured at low cost, relative to CCD image sensors, using standard CMOS IC fabrication processes.
Additionally, CCD image sensors typically require three different input voltages with separate power supplies to drive them. CCD images sensors also require relatively high power supply voltages and thus also require relatively high power to operate. By contrast, CMOS devices require only a single power supply, which may also be used to drive peripheral circuitry. This gives CMOS image sensors an advantage in terms of power consumption, and also in terms of the amount of chip area or “real-estate” devoted to power supplies.
CMOS image sensors have relatively low power requirements because of the relatively low voltage power supply required for operation, and also because only one row of pixels in the active pixel sensor array needs to be active during readout.
Despite these advantages, however, CMOS image sensors also have various disadvantages in comparison to CCD image sensors. For example, the quality of image obtained by a CMOS imager is in general poorer compared with that from a CCD imager. One of the contributing factors of poorer image quality in CMOS imagers is image pattern noise.
CMOS pattern noise is generally due to mismatches in the threshold voltages of the MOS transistors of a CMOS pixel, feedthrough of electronic charge, associated with the MOS pixel transistors, and mismatches in the processing circuits, including correlated double sampling amplifiers and analog-to-digital (A/D) converters.
The fixed pattern noise due to mismatches in the transistors' threshold voltages is typically removed by double sampling. Double-sampling of a CMOS pixel output at different times during the pixel reset and integration periods is a well-known technique often employed for correcting for the fixed pattern noise caused by CMOS transistor threshold voltage mismatch. This technique enables a determination of the extent of a pixel output that is due to fixed pattern noise, such that simple subtraction of a pixel reset value from a pixel output value at the end of an integration period removes the fixed pattern noise that stems from threshold voltage mismatches.
Typically such subtraction is carried out in the analog domain by the correlated double sampling amplifier or correlated double sampling circuit, or in the digital domain by a digital processing circuit. An analog subtraction technique using the correlated double sampling amplifier is typically carried out in two phases. During the first phase, the correlated double sampling amplifier samples the pixel output voltage level at the end of an integration period. The pixel output voltage sampled at this time is the sum of the reset value of the pixel and the response of the pixel to the incident light during the integration period. During the second phase, the pixel reset value is measured and subtracted from the previously sampled pixel output voltage by the correlated double sampling amplifier. The resulting output voltage from the correlated double sampling contains, to the first order, only the response to the incident light, if the correlated double sampling amplifier contributes no error.
The fixed pattern noise that is a result of feedthrough can similarly be removed by a noise compensation technique. However, both threshold mismatch and feedthrough noise compensation techniques do not remove image pattern noise that is due to mismatches in the processing circuits themselves. The image pattern noise due to mismatches in the processing circuits typically has a columnar structure, and is more highly objectionable to human visualization than the random pixel-to-pixel fixed pattern noise due to threshold mismatches and feedthrough.
More specifically, in conventional CMOS image sensor architecture, a selected or active row of active pixel sensors is read out in parallel to the row of correlated double sampling circuits during a row period. The output of the row of correlated double sampling circuits is then scanned rapidly by a horizontal shift register to read the line out to a common output port, thus any mismatch between the correlated double sampling circuits results in a column fixed pattern noise artifact in the captured image.
Such mismatches are typically caused by different DC offsets and gains in the signal amplification and processing provided by the correlated double sampling circuits. The fixed pattern noise artifacts produced by CMOS image sensors are typically very visible since they are not randomly distributed across the image, but are lined up on a column-by-column basis.
Most CMOS imagers employ column-parallel signal processing circuits that include double-sampling amplifiers and A/D converters, as described above. Typically, a single correlated double sampling amplifier sequentially samples the outputs of pixels that are situated in a common column. Thus, there is typically the same number of correlated double sampling circuits as the number of columns in a CMOS imager. The outputs of a number of correlated double sampling amplifiers are typically subsequently multiplexed to one A/D converter and converted to digital data.
FIG. 1 schematically illustrates, in block diagram form, a typical prior art CMOS imager 1 with column-based signal processing circuits 2. In this example, each column of pixels (5, 6, . . . , 10 & 12) has an associated correlated double sampling amplifier (7, 9, . . . , 11 & 13), and the outputs from two adjacent correlated double sampling amplifiers (7 & 9 or 11 & 13) are processed by an A/D converter (19 & 21, respectively) after being multiplexed by a multiplexer (15 & 17, respectively).
In general, a row of pixels is selected when the row select signal for that particular row, where the rows range from 1 to n, is set “high.” For example, as illustrated in FIG. 1, a row of pixels (5, 6, . . . , 10 & 12) is selected when the row select signal, RS1, 3 is set “high.” When RS1 3 is “high,” the pixels (5, 6, . . . , 10 & 12) are selected and the output of each pixel is connected to the input of a corresponding correlated double sampling amplifier (7, 9, . . . , 11 & 13) for the column in which that pixel is situated. As explained previously, mismatches in electrical characteristics among correlated double sampling amplifiers and A/D converters cause column pattern noise in the resulting image.
The resulting column pattern noise is because the electrical characteristics of the individual correlated double sampling amplifiers and A/D converters may be slightly different, due, e.g., to component mismatches. For example, correlated double sampling amplifiers may have different offset voltages due to mismatches in charge injection during the sampling process of the pixel output voltage. This means that the output values of all pixels in one column will have an offset due to the correlated double sampling amplifier of that column, while the output values of all pixels in the next column may have another offset due to the corresponding correlated double sampling amplifier for that pixel column.
The resulting image will include non-uniform column brightness, e.g., including darker and brighter columns across the image. The offset characteristic of each column is in general fixed, whereby the resulting highly-structured columnar imager noise pattern does not change with time. Such column pattern noise is visually prominent even when the difference in offset between adjacent pixel columns is very minute, e.g., one milli-volt or less.
Offset errors in the A/D converters manifest themselves similarly; with the exception that a number of columns processed by the same A/D converter appear grouped together. Gain mismatch among correlated double sampling amplifiers or A/D converters also produces column pattern noise. Since the error due to gain mismatch is a linear function of the input light intensity, the resulting column pattern noise is not fixed, but varies with input light intensity. Errors in A/D converter conversion linearity can also give rise to similar column pattern noise.
The image column pattern noise described above is especially noticeable when the scene to be imaged is relatively dark; in this case, the outputs of the imager pixels are often “gained up,” or amplified, to make the image brighter. In this case, the column pattern noise is also gained up by the same factor, making it more noticeable. Since the error due to gain mismatches among correlated double sampling amplifiers or A/D converters and the linearity errors in A/D converters are small when the intensity is low, the column pattern noise is here generally dominated by offset errors in correlated double sampling amplifiers and A/D converters. As stated previously, the offset errors contribute fixed-pattern noise that does not depend on the intensity of input light.
To compensate for this fixed pattern noise, it has been proposed that fixed pattern noise be reduced on a pixel-by-pixel basis. In such a compensation technique, calibration is carried out in which the dark offset of each pixel is determined under dark conditions and stored in a frame memory, later to be subtracted from images, pixel-by-pixel, once the image data from the pixels have been collected.
Although this technique does enable correction of the dark offset caused by both charge feedthrough and processing circuit mismatches, it requires the application of a calibration factor to the post-processing of images, thereby requiring extensive hardware. In addition, this proposed compensation process requires means for blocking input light, such as a mechanical shutter, so as to acquire the dark image. This further modification adds substantial cost to the camera system. As a result, for many applications, even this pattern noise compensation technique cannot be employed, and in general, compensation for non-fixed, gain-dependent cannot be achieved.
Therefore, it is desirable to provide a fixed pattern noise compensation technique that can compensate for gain and dark offset without requiring the post-processing of images. Moreover, it is desirable to provide a fixed pattern noise compensation technique that can compensate for gain and dark offset without requiring additional features, such as mechanical shutters that can add significant costs to the imaging system.